1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a method of forming fine patterns in a semiconductor device and a method of forming a gate using the same.
2. Description of the Related Art
FIG. 1 is a cross-sectional view illustrating a related art method of forming a gate in a semiconductor device.
To begin with, referring to FIG. 1, a gate insulating layer 20 is formed on a substrate 10 by a thermal oxidation.
Thereafter, a polysilicon 30 is deposited on the gate insulating layer 20. Then, a gate pattern (not shown) is formed using a photoresist film.
Afterwards, the polysilicon 30 is etched using the gate pattern as an etch mask so as to complete a formation of the gate 30 in the semiconductor device.
Meanwhile, as a modern semiconductor device becomes highly integrated and micronized, a critical dimension (CD) of the gate is also reduced proportionally. In particular, the performance of the semiconductor device depends on whether or not the critical dimension of the gate in nano-scale feature can be implemented in high technology semiconductors.
However, a variable to determine the critical dimension of the metal line in the related art mainly depends on the performance of a photolithographic apparatus.
Therefore, there is such a serious problem in the related art that the control of the critical dimension of the gate only depends on the performance limitation of the photolithographic apparatus utterly.